Method and apparatus for saving the effective address of floating point memory operations in an out-of-order microprocessor
US5721857A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 1996 |
| Grant date | Feb 24, 1998 |
| Priority date | — |
| Expiry date | May 22, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3834
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is provided for recovering the effective address of memory instructions in an out-of-order microprocessor for use by an exception handler upon the occurrence of one of an exception and a systems management interrupt. The microprocessor comprises at least one execution unit for executing a plurality of instructions out-of-order and a re-order buffer having storage locations for buffering result data produced from the execution of the plurality of instructions. Each instruction is associated with a location designator to identify a unique storage location within the re-order buffer in which the result data for an executed instruction is written. The microprocessor further comprises a memory order buffer having storage locations for buffering memory instructions waiting for access to memory for execution, these storage locations also being identified by corresponding location designators. According to this embodiment of the microprocessor, the effective address of memory instructions can be reconstructed by utilizing the location designators of the ROB (Reorder Buffer) to find the corresponding storage location in the MOB (Memory Order Buffer) at which place the linear addres…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.