Warren R. Morrow
22Patents
8h-index
27Co-inventors
75Inventor score
Filing activity: Sep 29, 1994 → May 28, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6487627B1 | Method and apparatus to manage digital bus traffic | Physics | 50 | Expired |
| US7366368B2 | Optical add/drop interconnect bus for multiprocessor architecture | Electricity | 49 | Expired |
| US7318130B2 | System and method for thermal throttling of memory modules | Physics | 40 | Expired |
| US5721857A | Method and apparatus for saving the effective address of floating point memory operations in an out-of-order microprocessor | Physics | 27 | Expired |
| US7130229B2 | Interleaved mirrored memory systems | Physics | 24 | Expired |
| US7386768B2 | Memory channel with bit lane fail-over | Emerging Cross-Sectional Technologies | 20 | Expired |
| US6693450B1 | Dynamic swing voltage adjustment | Electricity | 14 | Expired |
| US5612909A | Method and apparatus for rounding operands using previous rounding history | Physics | 8 | Expired |
| US6502154B1 | Bus bridging method and apparatus including use of read size indicators | Physics | 8 | Expired |
| US7017017B2 | Memory controllers with interleaved mirrored memory modes | Physics | 7 | Expired |
| US8135999B2 | Disabling outbound drivers for a last memory buffer on a memory channel | Emerging Cross-Sectional Technologies | 5 | Active |
| US7076618B2 | Memory controllers with interleaved mirrored memory modes | Physics | 5 | Expired |
| US6708240B1 | Managing resources in a bus bridge | Physics | 4 | Expired |
| US8020056B2 | Memory channel with bit lane fail-over | Emerging Cross-Sectional Technologies | 4 | Active |
| US8489944B2 | Disabling outbound drivers for a last memory buffer on a memory channel | Emerging Cross-Sectional Technologies | 4 | Active |
| US7761753B2 | Memory channel with bit lane fail-over | Emerging Cross-Sectional Technologies | 3 | Active |
| US7269481B2 | Method and apparatus for memory bandwidth thermal budgetting | Physics | 2 | Expired |
| US8971087B2 | Stacked memory with interface providing offset interconnects | Electricity | 1 | Active |
| US8510612B2 | Disabling outbound drivers for a last memory buffer on a memory channel | Emerging Cross-Sectional Technologies | 0 | Active |
| US9768148B2 | Stacked memory with interface providing offset interconnects | Electricity | 0 | Active |
| US8286039B2 | Disabling outbound drivers for a last memory buffer on a memory channel | Emerging Cross-Sectional Technologies | 0 | Active |
| US12046577B2 | Stacked memory with interface providing offset interconnects | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.