Fabrication procedure for a stable post
US5722162A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 1995 |
| Grant date | Mar 3, 1998 |
| Priority date | — |
| Expiry date | Oct 12, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49204
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An interconnecting post for mounting a microelectronic device such as an integral circuit chip is fabricated with generally uniform cross-section, by forming a first layer of positive photoresist on a substrate, soft-baking that first layer and exposing it for a short time with a wide-apertured mask or simply a UV blank flood exposure. Without developing the first layer, a second layer of positive resist is then applied over the first layer, soft-baked, and then exposed with a narrow-apertured mask. During the soft-baking of the second layer, some of its activator in the photoresist compound diffuses into the exposed portion of the first layer and modifies its solubility in such a way that, when the layers are subsequently developed, the developer partially undercuts the unexposed portion of the first layer to form in the photoresist an opening of generally uniform cross-section. This opening can then be filled by plating to produce a strong, integral interconnect post.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.