Insulated gate field effect transistor having guard ring regions
US5723882A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 1995 |
| Grant date | Mar 3, 1998 |
| Priority date | — |
| Expiry date | Mar 10, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/106
Abstract
An insulated gate field effect transistor comprising a semiconductor substrate having one side on which a cell area is composed of a plurality of first wells of a first conductivity type, each of the first wells containing a source region of a second conductivity type. A channel region is defined in the surface portion of the semiconductor substrate adjoining to the source region, and a gate electrode is formed, via a gate insulating film, at least over the channel region. A source electrode is in common contact with the respective source regions of the plurality of first wells. The semiconductor substrate has a drain electrode provided on another side. A current flows between the source electrode and the drain electrode through the channel being controlled by a voltage applied to the gate electrode. A guard ring area is disposed on the one side of the semiconductor substrate so as to surround the cell area. The source electrode has an extension connected to a second well of a second conductivity type formed in the one side between the cell area and the guard ring area to provide a by-pass such that, when a current concentration occurs within the guard ring area, the concentrated c…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.