GE-SI SOI MOS transistor and method of fabricating same
US5726459A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Jun 10, 1994 |
| Grant date | Mar 10, 1998 |
| Priority date | — |
| Expiry date | Jun 10, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6715
Abstract
A Ge--Si MOS transistor for high speed, high density applications in which a thin layer of silicon (Si) is doped to have a concentration of germanium (Ge) ions which is preferably between 10 and 30%. The germanium doped silicon is formed on a layer or substrate of insulator. Optional silicidation of the drain and source regions improves conductivity therein and the use of shallow SIMOX processing technologies results in a more cost-effective and rapid fabrication process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.