Silicon carbide MOSFET having self-aligned gate structure

US5726463A · kind A · utility

Assignee

• General Electric Company · US

Inventors

• Dale M. Brown · Schenectady, US
• Richard Joseph Saia · Niskayuna, US
• John Edmond · Durham, US
• John Williams Palmour · Raleigh, US

Key dates

• Filing date: Aug 7, 1992
• Grant date: Mar 10, 1998
• Expiry date: Aug 7, 2012

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/931

Abstract

A SiC MOSFET having a self-aligned gate structure is fabricated upon a monocrystalline substrate layer, such as a p type conductivity .alpha.6H silicon carbide (SiC) substrate. An SiC n+ type conductivity layer, epitaxially grown on the substrate layer, includes a steep-walled groove etched through the n+ SiC layer and partially into the p SiC layer. The groove is lined with a thin layer of silicon dioxide which extends onto the n+ type conductivity layer. A filling of gate metal over the layer of silicon dioxide is contained entirely in the groove. The silicon dioxide layer includes a first window extending to the filling of gate metal in the groove, and second and third windows extending to the n+ type conductivity layer on either side of the groove, respectively. A gate contact extends through the first window to the filling of gate metal in the groove while drain and source contacts extend through the second and third window, respectively, to make contact with the n+ type conductivity layer in drain and source regions on either side of the groove.