Data processor with circuitry for handling pointers associated with a register exchange operation
US5727176A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 1996 |
| Grant date | Mar 10, 1998 |
| Priority date | — |
| Expiry date | Mar 6, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S707/99936
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processor includes a plurality of physical registers and a decoder that decodes a stream of instructions into micro-operations which include speculative operations specifying associated logical registers. The data processor further includes a register-alias table having a plurality of addressable entries corresponding to logical registers, specified by the speculative operations. Each entry of the register-alias table contains a register pointer to a corresponding physical register. The processor further includes a retirement register file that maintains register values of non-speculative operations, and a retirement array that maintains a retirement ordering for the retirement register file. Both the register-alias table and retirement array are updated by circuitry that is responsive to a register exchange operation; the circuitry swapping register pointers associated with first and second entries, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.