Process for forming a semiconductor device with ESD protection
US5733794A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 1995 |
| Grant date | Mar 31, 1998 |
| Priority date | — |
| Expiry date | Feb 6, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/811
Abstract
A semiconductor device with an electrostatic discharge (ESD) protection transistor is devised, wherein the ESD protection transistor has halo regions of an opposite conductivity type from the source and drain regions adjacent thereto. In one embodiment, the ESD protection transistor is a thick field oxide (TFO) transistor. In some cases, the halo regions may be provided with an ion implant step without the use of an extra mask. The halo regions permit the ESD protection transistor to have its breakdown voltage adjusted so that it turns on before the device it is protecting is affected by an ESD event. The use of halo regions avoids the increase in device area and adverse effects to the AC performance of the circuit being protected that are disadvantages of prior approaches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.