Patent · US Expired

Method for the production of a three-dimensional circuit arrangement

US5741733A · kind A · utility

45Cited by
1References
26Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 15, 1996
Grant dateApr 21, 1998
Priority date
Expiry dateJul 15, 2016

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

To produce a three-dimensional circuit arrangement, a first substrate (1) is thinned, stacked onto a second substrate (2) and fixedly connected to the latter. The first substrate (1) and the second substrate (2) in this case each comprise circuit structures (12, 22) and metallization planes (13, 23). At least one first contact hole (16) and one second contact hole (4) are opened, which reach the metallization plane (13, 23) in the first substrate (1) and second substrate (2), respectively, the second contact hole (4) passing through the first substrate (1). The metallization planes (13, 23) of the two substrates (1, 2) are electrically connected to one another via a conductive layer (7).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.