System and method testing computer memories
US5742616A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 1995 |
| Grant date | Apr 21, 1998 |
| Priority date | — |
| Expiry date | Jun 7, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A self test circuit provides a general statement about the condition of a coupled memory which indicates whether a wanted or unwanted manipulation or alteration of the memory has occurred. The contents of the memory are not derivable from the general statement. The general statement is preferably a "fail" or "pass" statement stating whether a deviation in the contents of the memory with respect to a last executed test has been detected or not. The testing of a non-volatile memory is executed by generating a signature from the contents of the non-volatile memory and comparing the generated signature with a reference value of the signature. When the comparison of the generated signature with the reference value indicates a different, a signal is issued and access to the non-volatile memory is restricted and/or a failure procedure is started. Access to the non-volatile memory is allowed when the comparison signature with the reference value indicates no difference. In order to allow a test of whether an alteration of the contents of the non-volatile memory has happened between successive authorized applications, a new signature from the contents of the non-volatile memory is generated…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.