Method of making surface micro-machined accelerometer using silicon-on-insulator technology
US5747353A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 1997 |
| Grant date | May 5, 1998 |
| Priority date | — |
| Expiry date | Mar 11, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/135
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method of making a surface micro-machined accelerometer using a silicon-on-insulator (SOI) wafer structure. Both the acceleration (or deceleration) sensor and associated signal conditioning circuitry are monolithically fabricated on the same substrate. The top silicon layer of the SOI wafer is used as the sensing member, corresponding to the movable, common electrode of a differential capacitor pair. The components of the signal conditioning circuitry are fabricated in the SOI layer using standard SOI processing techniques. Because the top silicon layer is single crystal silicon, it does not suffer from the stress related warping common with polysilicon members. In addition, because the method described is compatible with bipolar, BiCMOS, or CMOS process flows, it may be used to fabricate faster and lower noise level signal conditioning circuitry than can be obtained using current techniques for making monolithic accelerometers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.