Analog channel for mixed-signal-VLSI tester
US5748124A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 9, 1996 |
| Grant date | May 5, 1998 |
| Priority date | — |
| Expiry date | Dec 9, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31716
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Mixed-signal tester architecture and methods are provided which minimize transfer of data, offer parallel data post-processing within the analog channels, and allow flexible synchronization. Multiple analog channels each have a source digital signal processor (DSP), a digital source sequencer, digital source instrumentation, analog source instrumentation, analog measure instrumentation, digital measure instrumentation, a digital pin multiplexer, a digital measure sequencer, DSP-addressable multi-bank capture memory, a capture digital signal processor, and an inter-DSP feedback path for communication between the source DSP and the capture DSP. Each analog channel can be arranged in a feedback loop through either its analog and/or digital instrumentation using the inter-DSP feedback path. DUT response is processed in the channel, the result is used to define parameters for a subsequent test cycle, and a signal corresponding to these parameters is generated and applied to the DUT. This loop-back of the result of a test cycle within the analog channel to define the next test cycle speeds up the test process. The source DSP can synthesize signals in real time and apply these to the DUT …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.