Semiconductor integrated circuit device
US5751041A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 16, 1996 |
| Grant date | May 12, 1998 |
| Priority date | — |
| Expiry date | Oct 16, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
In a semiconductor integrated circuit device having an input protection circuit element such as a diode formed in the semiconductor substrate, the leak current is suppressed. An nMOS transistor and a pMOS transistor that constitute a CMOS inverter circuit are formed using a SOI structure. An n-type diffusion layer and p-type diffusion layer are formed within the semiconductor substrate to thereby construct a protective diode that forms an input protection circuit for the CMOS inverter circuit. By surrounding the outer periphery of the n-type diffusion layer with the p-type diffusion layer, the depletion layer that is formed at an interface between the semiconductor substrate and a buried insulation film therein is cut off by the p-type diffusion layer, thereby suppressing the leak current between the n-type diffusion layer and the p-type diffusion layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.