Methods of forming semiconductor devices in substrates having inverted-trench isolation regions therein
US5753562A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 13, 1996 |
| Grant date | May 19, 1998 |
| Priority date | — |
| Expiry date | Dec 13, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/977
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of forming semiconductor substrates having inverted-trench isolation regions therein include the steps of forming at least one trench in a semiconductor substrate at a first face thereof and then forming a stopping layer on the bottom of the trench. An etching or polishing step is then performed on a second face of the substrate which extends opposite the first face, until the stopping layer is exposed. Semiconductor devices are then formed in the remaining portions of the substrate extending adjacent sidewalls of the trench, at the polished second face. In particular, first and second trenches are preferably formed at a first face of a first semiconductor substrate and then respective first and second stopping layers comprising silicon nitride are formed on bottoms of the first and second trenches. First and second electrically insulating layers (e.g., SiO.sub.2) are then formed on the first and second stopping layers, to fill the first and second trenches. The electrically insulating layers are then polished using a chemical-mechanical polishing step to form a substantially planar surface to which a second substrate is preferably bonded. A second face of the first substra…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.