Process for making doped polysilicon layers on sidewalls
US5759920A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 1996 |
| Grant date | Jun 2, 1998 |
| Priority date | — |
| Expiry date | Nov 15, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3065
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Method for creating a doped polysilicon layer of accurate shape on a sidewall of a semiconductor structure. According to the present method, a doped polysilicon film covering at least part of said semiconductor structure and of said sidewall is formed. This polysilicon film then undergoes a reactive ion etching (RIE) process providing for a high etch rate of said polysilicon film to approximately define the shape of the polysilicon layer on said sidewall. Then, said polysilicon film undergoes a second reactive ion etching process. This second reactive ion etching process is a low polysilicon etch rate process such that non-uniformities of the surface of said polysilicon film are removed by sputtering.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.