Built in self test with memory
US5764655A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 2, 1997 |
| Grant date | Jun 9, 1998 |
| Priority date | — |
| Expiry date | Jul 2, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31702
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit chip and an electronic system are disclosed, each incorporating a self-test system. The integrated circuit chip includes capability for Built In Self Test (BIST) and a non-volatile memory where the BIST may be self-programmable. The electronic system comprises, an integrated circuit chip which includes on the chip Built In Self Test (BIST) and a non-volatile memory, together with an off-chip test target. The integrated circuit chip and the electronic system are particularly useful for simplifying the testing of electronic products both in manufacturing and in the field, and are even more particularly useful in eliminating the need for large, complex, high speed testers in the manufacturing environment, substituting instead a simple power chuck to plug the product into.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.