Patent · US Expired

Method for manufacturing a semiconductor arrangement by introducing crystal disorder structures and varying diffusion rates

US5766973A · kind A · utility

3Cited by
3References
3Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 18, 1996
Grant dateJun 16, 1998
Priority date
Expiry dateOct 18, 2016

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10S148/174
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

In a semiconductor arrangement and a method for manufacturing a semiconductor arrangement, varying diffusion rates are attained by introducing crystal disorder structures into a silicon crystal. The semiconductor structure includes a semiconductor wafer which has a first layer and a second layer, which form a p-n junction. Because the diffusion rates vary, the gradient of the dopant concentration of the second layer in the edge area is greater (merely) than in the middle area. As a result, a breakdown of the p-n junction in the edge area is reached at higher voltages than in the middle area.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.