Method of forming floating gate type non-volatile semiconductor memory device having silicided source and drain regions
US5766997A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 27, 1996 |
| Grant date | Jun 16, 1998 |
| Priority date | — |
| Expiry date | Sep 27, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6891
Abstract
A field oxide is selectively formed on a silicon substrate. A first gate oxide is formed on the silicon substrate. Formed on the first gate oxide film is a floating gate which is comprised of a stack of a polysilicon film and a silicide layer with different thicknesses at different locations. Oxide spacer are formed on the side portions of the floating gate. A source region and a drain region are formed on the silicon substrate with a channel region disposed therebetween. Silicide layers are respectively formed on the source region and the drain region. The depth of the drain side silicide layer is shallower than the depth of the source side silicide layer. A step is provided on the surface of the floating gate. A control gate is formed on the floating gate via a gate insulator film. This structure provides a floating gate type non-volatile semiconductor memory device having a silicide layer which is optimized in accordance with the characteristics that are respectively needed for the source region and the drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.