High conversion gain CMOS mixer
US5768700A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 14, 1996 |
| Grant date | Jun 16, 1998 |
| Priority date | — |
| Expiry date | Mar 14, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D2200/0084
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A mixer contains a multiplier circuit that includes MOS transistors configured as a Gilbert multiplier cell without gain resistors such that a first and a second node are directly coupled to a folded cascode output stage. The mixer receives a differential radio frequency (RF) signal and a differential local oscillator (LO) signal, and it generates, at the first and second nodes, a differential intermediate frequency (IF) signal. The mixer further includes output and gain/filter stages coupled to the multiplier circuit. The output stage exhibits a low input impedance and a high output impedance, and it generates an output stage differential current approximately equal to the differential current of the IF differential signal. The gain/filter stage both controls conversion gain of the mixer, and it filters the high frequency components generated by said multiplier circuit. A capacitor, implemented as the gain/filter stage, and a folded-cascode circuit for the output stage are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.