Patent · US Expired

Method for forming a self-aligned bipolar junction transistor with silicide extrinsic base contacts and selective epitaxial grown intrinsic base

US5773350A · kind A · utility

57Cited by
10References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 10, 1997
Grant dateJun 30, 1998
Priority date
Expiry dateJul 10, 2017

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10S148/01

Abstract

In a method of fabricating a self-aligned bipolar junction transistor with silicide extrinsic base contacts and selective epitaxial grown intrinsic base region, the sinker and buried N+ layer regions are formed in a semiconductor substrate with trench oxide isolation. Thin oxide is then formed on the structure. Next, metal silicide is deposited on the thin oxide and p-dopant implanted into the silicide. LTO is then deposited on the doped silicide followed by deposition of nitride. Next, the nitride, LTO and silicide layers are etched, stopping on the thin oxide layer. The thin oxide is then etched to expose the silicon. The etch undercuts the thin oxide under the nitride. A thin p+ epitaxial base is then selectively grown on the silicon and the metal silicide only. The base can be silicon or a silicon germanium layer to form a heterojunction transistor. Next, thin LTO is deposited followed by deposition of nitride. An RIE of the nitride is then performed to form nitride spacers, stopping on the thin LTO. The thin LTO is then wet etched to open the epitaxial base. A n-type, low-doped, selective single crystalline silicon emitter is then grown. This is followed by deposition of polys…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.