Method for correcting placement errors in a lithography system
US5773836A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 28, 1996 |
| Grant date | Jun 30, 1998 |
| Priority date | — |
| Expiry date | Oct 28, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/31767
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method for correcting placement errors in a lithography system, and a system therefor, are disclosed. The method comprises the steps of obtaining metrology data of sufficient density to smoothly map an error to be corrected, deriving a metrology data grid coordinate system from the data, aligning the metrology data grid coordinate system to remove rigid body components, and for each of a plurality of lithographic fields: identifying a number of metrology sites nearest to the center of the field; establishing a reference grid coordinate system coinciding with the lithographic field; determining at least one correction factor which minimizes the residual errors; and applying at least one correction factor for at least one field to the first lithography system to correct a placement error. Such a method and system are particularly useful for error correction in e beam lithography tools.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.