Pipelined scan enable for fast scan testing
US5774474A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 14, 1996 |
| Grant date | Jun 30, 1998 |
| Priority date | — |
| Expiry date | Mar 14, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318555
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
High speed scan testing is facilitated by pipelining or distributing a scan enable signal to scan circuits through a distribution network. The pipeline is formed from a plurality of scan enable distribution circuits residing on an integrated circuit to be scan tested. Preferably, before reaching the scan circuits, the scan enable signal passes through an equal number of the scan enable distribution circuits. The distribution network of the scan enable distribution circuits take a multitude of forms. The invention allows at-speed toggling of a scan enable signal as well as shifting of test data at functional system frequencies, while maintaining compatibility with test modes such as IEEE Standard 1149.1. The invention is also capable of supporting skewed-load and broad-side delay test modes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.