Merge/mask, rotate/shift, and boolean operations from two instruction sets executed in a vectored mux on a dual-ALU
US5781457A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 14, 1996 |
| Grant date | Jul 14, 1998 |
| Priority date | — |
| Expiry date | May 14, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/762
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Boolean logic unit (BLU) features a vectored mux. Boolean instructions are executed by applying operands to the select inputs but truth-table signals to the data inputs. Merge and mask operations are performed by reversing the connection and inputting the operands to the data inputs but applying a merge mask to the select inputs. A byte-spreader copies byte or 16-bit operands to 32-bits before being rotated and merged by the vectored mux. A rotator is used to rotate an operand before being applied to the data input of the vectored mux so that compound rotate-merge operations can be executed in a single step through the vectored mux. A carry flag may also be merged in during a multi-step bit-test instruction. Complex CISC instructions such as rotate-through-carry and shift-double are executed in multiple steps on the vectored mux. Intermediate results are stored in the multiplier-quotient temporary registers which are normally used for multiply and divide instructions. A RISC ALU using the vectored mux BLU is modified only slightly to support execution of CISC instructions. Merge, mask, rotate, shift, and Boolean operations of both RISC and CISC instruction sets are executed in th…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.