Voltage pumping circuit for semiconductor memory device
US5781494A · kind A · utility
30Cited by
3References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 27, 1996 |
| Grant date | Jul 14, 1998 |
| Priority date | — |
| Expiry date | Dec 27, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/145
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device comprising a memory cell array including at least two banks and a desired number of voltage pumping circuits each for pumping an input voltage to a desired level. The voltage pumping circuits are driven in response to at least two bank selection control signals. The voltage pumping circuits are arranged in the semiconductor memory device in a proper manner to efficiently perform the voltage pumping operation, so as to increase the pumping efficiency. Further, the proper arrangement of the voltage pumping circuits contributes to the integration of the semiconductor memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.