Method for forming a monolithic electronic module by stacking planar arrays of integrated circuit chips

US5786237A · kind A · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Martha Ashley Clark Cockerill · Austin, US
• John Maltabes · Austin, US
• Loretta J. O'Connor · Colchester, US
• Steven H. Voldman · South Burlington, US

Key dates

• Filing date: Aug 16, 1995
• Grant date: Jul 28, 1998
• Expiry date: Aug 16, 2015

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A fabrication method for manufacturing a monolithic electronic module comprising a plurality of stacked planar extending arrays of integrated circuit chips. The fabrication method includes dicing a wafer of integrated circuit chips into a plurality of arrays of integrated circuit chips. The arrays of integrated circuit chips are then stacked to form an electronic module. A metallization pattern may be deposited on a substantially planar surface of the electronic module, and used to interconnect the various arrays of integrated circuit chips contained therein. Specific details of the fabrication method and resultant multi-chip package are set forth.