Method for producing a channel region layer in a voltage controlled semiconductor device
US5786251A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 1996 |
| Grant date | Jul 28, 1998 |
| Priority date | — |
| Expiry date | Jul 9, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/931
Abstract
In a method for producing a channel region layer in a SiC-layer for providing a voltage-controlled semiconductor device a layer of silicon being one of a) polycrystalline and b) amorphous is applied on top of the SiC-layer, an aperture is etched in the silicon layer extending to the SiC-layer, a surface layer of a certain thickness of the silicon layer is oxidized, and the lateral extension of the channel region layer is determined by removing the oxidized layer and carrying out a further implantation into the area exposed by the so formed enlarged aperture.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.