System for reducing the power consumption of a computer system and method therefor
US5787294A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 13, 1995 |
| Grant date | Jul 28, 1998 |
| Priority date | — |
| Expiry date | Oct 13, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a system and method for reducing the power consumption of a computer system, more specifically a notebook computer system. The system comprises a programmable frequency generator and a programmable power supply which alters the current operating frequency and voltage of the computer's microprocessor to match current operating conditions. If the microprocessor is not doing any meaningful work, the programmable frequency generator and the programmable power supply can reduce both the operating frequency and voltage thereby lowering the power consumption of the computer system based on the formula: power=voltage.sup.2 .times.frequency. It should be noted that the programmable frequency generator and the programmable power supply may be attached to other system components in the computer system that consume a large amount of the computer system's power.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.