Method for forming high dielectric capacitor electrode structure and semiconductor memory devices
US5793600A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 20, 1995 |
| Grant date | Aug 11, 1998 |
| Priority date | — |
| Expiry date | Oct 20, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/435
Abstract
A capacitor and electrode structure comprising a PZT ferroelectric layer 17 with a primary component (Pb) and secondary component (Ti), a lower electrode layer 16 formed on the underside of the ferroelectric layer and made up of a special element (Pt) and Ti, and compounds thereof, and a diffusion barrier layer 18 which is formed on the underside of the lower electrode layer and which functions as a diffusion barrier with respect to Pb. The capacitor and the electrode structure, which may be a component of a semiconductor memory device, suppress fluctuations in the composition of the ferroelectric layer in PZT, etc., so as to maintain the intended performance of the PZT ferroelectric layer, thereby simplifying and stabilizing film fabrication, and preventing the degradation of electrical characteristics and adverse effects on lower layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.