Self-checking content-addressable memory and method of operation for detecting multiple selected word lines
US5796758A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 8, 1996 |
| Grant date | Aug 18, 1998 |
| Priority date | — |
| Expiry date | Oct 8, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/51
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Content Addressable Memory (CAM) includes a plurality of conventional CAM cells arranged in rows and columns, the CAM cells being coupled together by word lines and bit lines for reading from and writing information into the CAM cells. Each CAM cell in a row is connected to a match line which provides an indication when an input word on the bit lines matches the contents of the cells coupled to the match line. A combinatorial logic circuit including a parity generator is coupled to the word lines and provides an indication when multiple words have been selected by an input word. The combinatorial logic circuit includes an OR circuit providing a first input to an AND circuit and a parity generator providing a second input to the AND which only provides an output when multiple word lines have been selected by an input word.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.