Electroless copper plating method for forming integrated circuit structures
US5801100A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 1997 |
| Grant date | Sep 1, 1998 |
| Priority date | — |
| Expiry date | Mar 7, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/904
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a copper containing integrated circuit structure within an integrated circuit, and the copper containing integrated circuit structure formed through the method. There is first provided a substrate layer. There is then formed through a first electroless plating method a nickel containing conductor layer over the substrate layer. There is then activated the nickel containing conductor layer to form an activated nickel surface of the nickel containing conductor layer. Finally, there is then formed through a second electroless plating method a copper containing conductor layer upon the nickel containing conductor layer. Optionally, there may be formed a polysilicon layer over the substrate prior to forming the nickel containing conductor layer over the substrate, where the nickel containing conductor layer is formed upon the polysilicon layer. Optionally, there may also be formed a second nickel containing conductor layer upon the copper containing conductor layer. The method is useful in forming copper containing integrated circuit inductor structures within integrated circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.