Deselected word line that floats during MLC programming of a flash memory
US5801991A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 1997 |
| Grant date | Sep 1, 1998 |
| Priority date | — |
| Expiry date | Mar 31, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of programming a flash memory cell. The method occurs in a memory device having a decoder that receives a select signal. The decoder is coupled to a first word line and a second word line. The first word line is coupled to a first memory cell and the second word line is coupled to a second memory cell. The select signal is asserted to a first voltage such that the decoder selects the first word line and the first memory cell and deselects the second word line and the second memory cell. The select signal is then asserted to a second voltage such that the decoder couples a programming voltage to the first word line and floats the second word line. The first memory cell is then programmed while the second word line is floating.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.