Method of fabricating spaced apart submicron magnetic memory cells
US5804458A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 1996 |
| Grant date | Sep 8, 1998 |
| Priority date | — |
| Expiry date | Dec 16, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/01
Abstract
A method of fabricating a plurality of spaced apart submicron memory cells is disclosed, including the steps of depositing a magnetoresistive system on a substrate formation, depositing and patterning a first layer of material to form sidewalls, and depositing a second, selectively etchable, layer of material on the first layer of material, etching the second layer of material to define spacers on the sidewalls of the first layer of material, etching the magnetoresistive system, using the spacers as a mask, to define a plurality of spaced apart submicron magnetic memory cells, and depositing electrical contacts on the plurality of spaced apart submicron magnetic memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.