Stacked electrical device having regions of electrical isolation and electrical connections on a given stack level
US5804853A · kind A · utility
9Cited by
11References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 26, 1996 |
| Grant date | Sep 8, 1998 |
| Priority date | — |
| Expiry date | Jul 26, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
A semiconductor structure having electrical conductors positioned over each other, but electrically isolated from each other, is disclosed. The lower conductor has a recess in its upper surface, and the recess is at least partially filled with an oxide-type material, thereby isolating the lower conductor from the upper conductor. These conductors would normally contact each other because of the somewhat imprecise patterning and etching steps used to fabricate a multitude of conductive elements, e.g., in a very dense semiconductor structure. Stacked capacitor cells incorporating this structure are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.