Hing Wong
25Patents
13h-index
26Co-inventors
77Inventor score
Filing activity: Dec 12, 1991 → Jun 15, 2009
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5521422A | Corner protected shallow trench isolation device | Electricity | 67 | Expired |
| US5615164A | Latched row decoder for a random access memory | Physics | 50 | Expired |
| US6288922A | Structure and method of an encoded ternary content addressable memory (CAM) cell for low-power compare operation | Physics | 34 | Expired |
| US5741738A | Method of making corner protected shallow trench field effect transistor | Electricity | 30 | Expired |
| US6236617A | High performance CMOS word-line driver | Physics | 26 | Expired |
| US5963489A | Method and apparatus for redundancy word line replacement in a repairable semiconductor memory device | Physics | 24 | Expired |
| US5691946A | Row redundancy block architecture | Physics | 22 | Expired |
| US5276641A | Hybrid open folded sense amplifier architecture for a memory device | Physics | 22 | Expired |
| US5610867A | DRAM signal margin test method | Physics | 21 | Expired |
| US6115300A | Column redundancy based on column slices | Physics | 21 | Expired |
| US5619460A | Method of testing a random access memory | Physics | 21 | Expired |
| US6069815A | Semiconductor memory having hierarchical bit line and/or word line architecture | Physics | 17 | Expired |
| US5602051A | Method of making stacked electrical device having regions of electrical isolation and electrical connection on a given stack level | Electricity | 15 | Expired |
| US5903512A | Circuit and method to externally adjust internal circuit timing | Physics | 13 | Expired |
| US6136686A | Fabrication of interconnects with two different thicknesses | Electricity | 13 | Expired |
| US6327197A | Structure and method of a column redundancy memory | Physics | 12 | Expired |
| US5559050A | P-MOSFETS with enhanced anomalous narrow channel effect | Electricity | 12 | Expired |
| US5556802A | Method of making corrugated vertical stack capacitor (CVSTC) | Emerging Cross-Sectional Technologies | 10 | Expired |
| US5517442A | Random access memory and an improved bus arrangement therefor | Physics | 9 | Expired |
| US5804853A | Stacked electrical device having regions of electrical isolation and electrical connections on a given stack level | Electricity | 9 | Expired |
| US6262928A | Parallel test circuit and method for wide input/output DRAM | Physics | 7 | Expired |
| US5745430A | Circuit and method to externally adjust internal circuit timing | Physics | 7 | Expired |
| US7913347B2 | Rotational toothbrush | Human Necessities | 7 | Active |
| US5848008A | Floating bitline test mode with digitally controllable bitline equalizers | Physics | 4 | Expired |
| US5559739A | Dynamic random access memory with a simple test arrangement | Physics | 3 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.