Semiconductor substrate having alignment marks for locating circuitry on the substrate
US5805421A · kind A · utility
22Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 21, 1997 |
| Grant date | Sep 8, 1998 |
| Priority date | — |
| Expiry date | Mar 21, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device having alignment marks that are located on the integrated circuit device semiconductor substrate and aligned to the integrated circuit. The alignment marks are used in conjunction with a circuit diagram of the integrated circuit to determine the point on the bottom of the semiconductor substrate residing beneath the portion of the integrated circuit which the practitioner desires to access.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.