Method and apparatus for finite-length arithmetic coding
US5808572A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 1997 |
| Grant date | Sep 15, 1998 |
| Priority date | — |
| Expiry date | May 22, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/4006
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In this invention, we introduce a connection indexing algorithm for realizing the arithmetic coding in finite wordlength processors. By determining the number of encoded information bits according to a difference between the finite wordlength and a residual termination parameter defined by the maximum difference of the information bits of any two adjacent symbols in the ordered-probabilities symbols set, the information of the last symbol is split into the current and the subsequent finite length codewords. The two or three encoded symbols split into the current and the subsequent finite length codewords are decoded independently, and the indices thereof are added to form a decoded symbol having an index equal to a sum of the addition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.