System and method for program execution tracing within an integrated processor
US5809293A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 1994 |
| Grant date | Sep 15, 1998 |
| Priority date | — |
| Expiry date | Jul 29, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/865
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for tracing program code within a processor having an embedded cache memory. The non-invasive tracing technique minimizes the need for trace information to be broadcast externally. The tracing technique monitors changes in instruction flow from the normal execution stream of the code. The tracing technique monitors the updating of processor branch target register contents in order to monitor branch target flow of the code. A FIFO and serial logic circuitry is utilized to minimize the number of chip pins required to broadcast the information from the chip. The tracing technique utilizes instruction and data breakpoint debug functions to signal an external trace tool that a trace event has occurred.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.