Prefetching of committed instructions from a memory to an instruction cache
US5809529A · kind A · utility
17Cited by
9References
24Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 6, 1995 |
| Grant date | Sep 15, 1998 |
| Priority date | — |
| Expiry date | Nov 6, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0897
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for selectively prefetching a cache line into a primary instruction cache within a processor from main memory allows for cold cache instruction prefetching of additional cache lines when the requested cache line does not reside within either the primary or secondary cache associated with the processor and there are not unresolved branches associated with the requested instruction in the cache line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.