Memory cell structure fabricated with improved fabrication process by forming dielectric layer directly on an insulated surface of a substrate
US5811852A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 17, 1996 |
| Grant date | Sep 22, 1998 |
| Priority date | — |
| Expiry date | Jan 17, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/681
Abstract
This invention discloses a programmable read-only-memory (PROM). The PROM is formed and supported on a substrate. The PROM includes a transistor region in the substrate including a source region, a drain region and a floating gate region disposed between the drain region and the source region. The PROM further includes a floating gate formed on top of the floating gate region with a single poly layer on the substrate. The PROM further includes a floating gate extension region disposed near the transistor region, the floating gate extension region is connected with the floating gate region. The PROM further includes a control gate formed on the substrate near the floating gate extension region opposite the transistor region whereby a charge state of the floating gate extension region is controlled by the control gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.