Flexible synchronous/asynchronous cell structure for a high density programmable logic device
US5811986A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 1995 |
| Grant date | Sep 22, 1998 |
| Priority date | — |
| Expiry date | Jun 6, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17716
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic device (PLD) cell is used to construct a high density high performance programmable logic device (PLD). The PLD cell includes two programmable logic block cells. The PLD cell also includes an I/O cell and an input macrocell. In addition the PLD cell includes a sub-bank of a programmable output switch matrix bank and a sub-bank of a programmable input switch matrix bank. Each programmable logic block cell includes a multiplicity of product terms. At least one product term in the cluster is programmably available to the cluster. When the product term is disconnected from the cluster, the product term is used for control of the polarity of the logic macrocell output signal or asynchronous functions. Thus, the programmably connectable product term can be used for either synchronous or asynchronous operations. If the programmably connectable and disconnectable product term is connected to the product term cluster, the programmable logic block cell is used for synchronous operations. However, since each product term cluster is associated with a logic macrocell, the logic macrocell can be individually configured for asynchronous operation by simply disconnecting the a…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.