Wordline wakeup circuit for use in a pulsed wordline design
US5812482A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 1996 |
| Grant date | Sep 22, 1998 |
| Priority date | — |
| Expiry date | Nov 13, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/418
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A wordline wakeup circuit for use in a static memory responsive to an external clock signal and chip enable signals provided by a controller/microprocessor to perform a memory operation on the static memory. The wordline wakeup circuit receives a global clock (GCLK) signal generated by memory control circuitry from the external clock signal and a word line enable (WLEN) signal asserted by the control circuitry when the chip enables indicate a pending memory operation. The wordline wakeup circuit asserts a wordline wakeup signal (LWLEN) signal as soon as possible after the GCLK signal goes high. The LWLEN signal when asserted activates decoder circuity to assert wordlines as necessary to perform the memory operation. If the WLEN signal is provided, the wordline wakeup circuit keeps the LWLEN signal high for at least the high portion of the GCLK signal, enabling the decoder to execute the memory operation, if the WLEN signal is not provided, the wordline wakeup circuit drops the LWLEN signal. The short pulse made by the LWLEN signal when there is no pending memory operation does not affect the decoder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.