Yong Jiang
45Patents
9h-index
49Co-inventors
75Inventor score
Filing activity: Sep 29, 1995 → Apr 4, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5933385A | System and method for a flexible memory controller | Physics | 23 | Expired |
| US5940337A | Method and apparatus for controlling memory address hold time | Physics | 18 | Expired |
| US8321706B2 | USB self-idling techniques | Emerging Cross-Sectional Technologies | 18 | Active |
| US5602502A | Circuit for detecting when a supply output voltage exceeds a predetermined level | Electricity | 16 | Expired |
| US5774471A | Multiple location repair word line redundancy circuit | Physics | 13 | Expired |
| US8839016B2 | USB self-idling techniques | Emerging Cross-Sectional Technologies | 10 | Active |
| US5943288A | Apparatus and method for minimizing address hold time in asynchronous SRAM | Physics | 10 | Expired |
| US5852379A | Fuse tunable, RC-generated pulse generator | Electricity | 9 | Expired |
| US7904625B1 | Power savings for universal serial bus devices | Emerging Cross-Sectional Technologies | 9 | Active |
| US7890691B2 | Memory cache sharing in hybrid hard disk | Physics | 9 | Active |
| US5812482A | Wordline wakeup circuit for use in a pulsed wordline design | Physics | 9 | Expired |
| US5848022A | Address enable circuit in synchronous SRAM | Physics | 9 | Expired |
| US8481317B2 | Hepatocyte production by forward programming | Chemistry; Metallurgy | 6 | Active |
| US7064592B2 | Method and apparatus for numeric optimization of the control of a delay-locked loop in a network device | Electricity | 6 | Expired |
| US6920552B2 | Network interface with double data rate and delay locked loop | Electricity | 6 | Expired |
| US9280395B2 | Runtime dispatching among a heterogeneous group of processors | Physics | 4 | Active |
| US5844428A | Driver circuit for use with a sensing amplifier in a memory | Electricity | 4 | Expired |
| US6934866B2 | Network interface using programmable delay and frequency doubler | Electricity | 4 | Expired |
| US7132866B2 | Method and apparatus for glitch-free control of a delay-locked loop in a network device | Electricity | 3 | Expired |
| US9807604B2 | Area-based location privacy management | Electricity | 2 | Active |
| US9260722B2 | Hepatocyte production by forward programming | Chemistry; Metallurgy | 2 | Active |
| US9191108B2 | Techniques for low power visual light communication | Electricity | 1 | Active |
| US9022802B2 | Terminal module | Electricity | 1 | Active |
| US7134010B2 | Network interface with double data rate and delay locked loop | Electricity | 1 | Expired |
| US8882522B2 | Electrical connector | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.