Very dense integrated circuit package
US5814885A · kind A · utility
44Cited by
22References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 28, 1997 |
| Grant date | Sep 29, 1998 |
| Priority date | — |
| Expiry date | Apr 28, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit package including a carrier having a surface topography of projections or recesses for supporting individual semiconductor circuit chips having a conversely matching bottom surface topography to permit self-aligned positioning of the chip on the carrier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.