Flexible time write operation
US5815463A · kind A · utility
6Cited by
13References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 12, 1997 |
| Grant date | Sep 29, 1998 |
| Priority date | — |
| Expiry date | Jun 12, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and circuits are disclosed for a semiconductor memory that allow one or more clock cycles per memory write operation, which allow the memory clock cycle time to be varied, and which minimize power dissipation. This is achieved by providing circuits that generate a minimum internal write time reference, independent of the chosen clock cycle time, so that a memory write cycle might take one clock cycle, or more than one clock cycle if the clock cycle is shortened.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.