Inventor · Hsinchu, TW

Chun Shiah

52Patents
7h-index
32Co-inventors
72Inventor score

Filing activity: Jun 10, 1996 → Apr 10, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US7054178B1 Datapath architecture for high area efficiency Physics 418 Expired
US6130853A Address decoding scheme for DDR memory Physics 25 Expired
US6101138A Area efficient global row redundancy scheme for DRAM Physics 13 Expired
US5723994A Level boost restoration circuit Electricity 8 Expired
US7843222B1 Buffer-driving circuit capable of increasing responding speed and prolonging lifespan, buffer, and method thereof Electricity 7 Active
US6861877B2 Circuit to independently adjust rise and fall edge timing of a signal Electricity 7 Expired
US6894917B2 DRAM refresh scheme with flexible frequency for active and standby mode Physics 7 Expired
US5815463A Flexible time write operation Physics 6 Expired
US7969253B2 VCO with stabilized reference current source module Electricity 5 Active
US7414448B2 Duty cycle correction circuit Electricity 4 Active
US7515669B2 Dynamic input setup/hold time improvement architecture Electricity 3 Active
US7738306B2 Method to improve the write speed for memory products Physics 3 Active
US7362144B2 Low jitter input buffer with small input signal swing Electricity 3 Expired
US7466013B2 Semiconductor die structure featuring a triple pad organization Electricity 2 Active
US8144526B2 Method to improve the write speed for memory products Physics 2 Active
US8723570B2 Delay-locked loop and method for a delay-locked loop generating an application clock Electricity 2 Active
US10387047B2 Memory circuit with improved read and write access Physics 2 Active
US7880517B2 Delayed-locked loop with power-saving function Electricity 2 Active
US8432206B2 Delay lock loop system with a self-tracking function and method thereof Electricity 2 Active
US7609579B2 Memory module with failed memory cell repair function and method thereof Physics 2 Active
US7940093B2 Output circuit with overshoot-reducing function Electricity 2 Active
US7755406B2 Duty cycle correction circuit with wide-frequency working range Electricity 2 Active
US9214448B2 Bundled memory and manufacture method for a bundled memory with an external input/output bus Electricity 2 Active
US8872540B2 Method of sharing in use an impedance matching circuit of a memory circuit to perform an initial calibration and a full time refresh mode calibration, and memory circuit with an impedance matching circuit capable of being used in an initial calibration and a full time refresh mode calibration Physics 1 Active
US8755236B2 Latch system applied to a plurality of banks of a memory circuit Physics 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.