Semiconductor device having a pedestal
US5818098A · kind A · utility
10Cited by
8References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 29, 1996 |
| Grant date | Oct 6, 1998 |
| Priority date | — |
| Expiry date | Feb 29, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0217
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A graded-channel semiconductor device (10) is formed in a pedestal (12). The pedestal (12) is formed on a substrate (11) and improves the electrical characteristics of the device (10) compared to conventional device structures. The pedestal (12) has sides (13) that are bordered by a first dielectric layer (24) to provide electrical isolation. An interconnect structure (90) can be optionally formed in conjunction with the formation of the device (10). The interconnect structure (90) has a plurality of conductors (60, 97) that can be used to transport electrical signals across the device (10).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.