System for improving the real-time functionality of a personal computer which employs an interrupt servicing DMA controller
US5822568A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 20, 1996 |
| Grant date | Oct 13, 1998 |
| Priority date | — |
| Expiry date | May 20, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system comprising an improved DMA controller for performing DMA transfers between a peripheral device and system memory and receiving and servicing interrupts generated by the peripheral device. The system comprises one or more buses for transferring data. A CPU, system memory and a plurality of peripheral devices are interconnected by the buses. Each of the peripheral devices comprises one or more peripheral interrupt request outputs. The system further comprises a programmable DMA controller coupled to the bus which receives the peripheral interrupt request outputs. The DMA controller is configured to perform a DMA transfer on the one or more buses between two or more devices, including the system memory and the plurality of peripheral devices. The CPU programs the DMA controller to start the DMA transfer in response to one of the plurality of peripheral devices generating an interrupt request on its interrupt request output or to start the DMA transfer immediately. The system further comprises a peripheral interrupt controller (PIC) coupled to the CPU. The PIC includes a plurality of PIC interrupt request inputs coupled to the DMA controller. The DMA controller is con…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.