Testing and diagnostic mechanism
US5825784A · kind A · utility
6Cited by
7References
6Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Sep 17, 1997 |
| Grant date | Oct 20, 1998 |
| Priority date | — |
| Expiry date | Sep 17, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2733
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A testing and diagnostic mechanism includes an external bus master allows access of virtually all internal registers on an integrated circuit, and allows the on-chip SRAM/DRAM controllers to access external memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.