Semiconductor memory device including a capacitor having a top portion which is a diffusion barrier
US5828129A · kind A · utility
8Cited by
9References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 23, 1997 |
| Grant date | Oct 27, 1998 |
| Priority date | — |
| Expiry date | Jan 23, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/692
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device suitable for forming a capacitor using a high dielectric film for a highly integrated semiconductor device includes a semiconductor substrate, an insulating film having a contact hole, the insulating film being over the semiconductor substrate, a conductive film on the semiconductor substrate through the contact hole, the conductive film having a top portion acting as a diffusion barrier, a first electrode over the conductive films, a dielectric film over the first electrode, and a second electrode over the dielectric film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.