Process for reducing halogen concentration in a material layer during semiconductor device fabrication
US5830802A · kind A · utility
17Cited by
4References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 31, 1995 |
| Grant date | Nov 3, 1998 |
| Priority date | — |
| Expiry date | Aug 31, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/147
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for reducing halogen concentration in a material layer (56) includes the deposition of a dielectric layer (58) overlying the material layer (56). An annealing process is carried out to diffuse halogen atoms from the material layer (56) into the overlying dielectric layer (58). Once the diffusion process is complete, the dielectric layer (58) is removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.